#define ABSOLUTE                 \
	if(opcycle == 2){EA_FETCHLO;}\
	else if(opcycle == 3){EA_FETCHHI;}
#define ABSOLUTEX                \
	if(opcycle == 2){EA_FETCHLO;} \
	else if(opcycle == 3)              \
		{                          \
		EA_FETCHHI;                \
		tmp = ((EA + x) & 0xff) | (EA & 0xff00);  \
		}                          \
	else if(opcycle == 4)              \
		{                          \
		READ(tmp);                 \
		EA += x;                   \
		}
#define ABSOLUTEY                \
	if(opcycle == 2){EA_FETCHLO;} \
	else if(opcycle == 3)              \
		{                          \
		EA_FETCHHI;                \
		tmp = ((EA + y) & 0xff) | (EA & 0xff00);  \
		}                          \
	else if(opcycle == 4)              \
		{                          \
		READ(tmp);                 \
		EA += y;                   \
		}
#define ABSOLUTEX_R              \
	if(opcycle == 2){EA_FETCHLONOHI;} \
	else if(opcycle == 3)              \
		{                          \
		tmp = EA + x;					\
		if(tmp & 0xff00)				\
			extracycle = 1;         \
		else                       \
			extracycle = 0;         \
		EA_FETCHHI;                \
		EA += x;							\
		EA &= 0xFFFF;					\
		}                          \
	else if(opcycle == 4 && extracycle)\
		{READ(EA);}                 
#define ABSOLUTEY_R              \
	if(opcycle == 2){EA_FETCHLO;} \
	else if(opcycle == 3)         \
		{                          \
		tmp = EA + y;					\
		if(tmp & 0xff00)				\
			extracycle = 1;         \
		else                       \
			extracycle = 0;         \
		EA_FETCHHI;                \
		EA += y;							\
		EA &= 0xFFFF;					\
		}                          \
	else if(opcycle == 4 && extracycle)\
		{READ(EA);}
#define ZEROPAGE                       \
	if(opcycle == 2){EA_FETCHLONOHI;}
#define ZEROPAGEX                      \
	if(opcycle == 2){EA_FETCHLONOHI;}   \
	else if(opcycle == 3)                    \
		{                                \
		READ(eaddr);                     \
		eaddr += x;                      \
		eaddr &= 0xff;                   \
		}
#define ZEROPAGEY                      \
	if(opcycle == 2){EA_FETCHLONOHI;}   \
	else if(opcycle == 3)                    \
		{                                \
		READ(eaddr);                     \
		eaddr += y;                      \
		eaddr &= 0xff;                   \
		}
#define INDIRECTX                      \
	if(opcycle == 2){EA_FETCHLONOHI;}   \
	else if(opcycle == 3)                    \
		{                                \
		READ(EA);								\
		EA += x;									\
		EA &= 0xFF;								\
		}                                \
	else if(opcycle == 4)  tmp = READ(EA);	\
	else if(opcycle == 5)                    \
		{                                \
		EA = READ((EA+1)&0xFF) << 8;				\
		EA |= tmp;								\
		}
#define IND_IDX                        \
	if(opcycle == 2){EA_FETCHLONOHI;}   \
	else if(opcycle == 3)  tmp = READ(EA);   \
	else if(opcycle == 4)                    \
		{                                \
		tmp |= (READ(EA+1) << 8);        \
		EA = ((tmp + y) & 0xff) | (tmp & 0xff00); \
		}                                \
	else if(opcycle == 5) \
		{             \
		READ(EA);     \
		EA = tmp + y; \
		}
#define IND_IDX_R                      \
	if(opcycle == 2){EA_FETCHLONOHI;}   \
	else if(opcycle == 3)  tmp = READ(EA);   \
	else if(opcycle == 4)                    \
		{                                \
		tmp |= (READ((EA+1)&0xFF) << 8);        \
		EA = (tmp + y) & 0xff;  \
		EA |= tmp & 0xff00;     \
		if(((tmp + y) & 0xff00) != (tmp & 0xff00))       \
			extracycle = 1;         \
		else                       \
			extracycle = 0;         \
		}                                \
	else if(opcycle == 5 && extracycle) \
		{                                \
		READ(EA);                        \
		EA = (tmp + y) & 0xFFFF;         \
		}

#define DE(rr)        \
	if(opcycle == 2)   \
		{               \
		rr--;           \
		CHECK_NZ(rr);   \
		LASTCYCLE;      \
		}
#define IN(rr)        \
	if(opcycle == 2)   \
		{               \
		rr++;           \
		CHECK_NZ(rr);   \
		LASTCYCLE;      \
		}
#define DEC(cc)                           \
	if(opcycle == (cc))  data = READ(EA);  \
	else if(opcycle == ((cc)+1))           \
		{                                   \
		WRITE(EA,data);                     \
		data--;                             \
		}                                   \
	else if(opcycle == ((cc)+2))           \
		{                                   \
		WRITE(EA,data);                     \
		CHECK_NZ(data);                     \
		LASTCYCLE;                          \
		}
#define INC(cc)                           \
	if(opcycle == (cc))  data = READ(EA);  \
	else if(opcycle == ((cc)+1))           \
		{                                   \
		WRITE(EA,data);                     \
		data++;                             \
		}                                   \
	else if(opcycle == ((cc)+2))           \
		{                                   \
		WRITE(EA,data);                     \
		CHECK_NZ(data);                     \
		LASTCYCLE;                          \
		}
#define T(ss,dd)     \
	if(opcycle == 2)  \
		{              \
		dd = ss;       \
		CHECK_NZ(dd);	\
		LASTCYCLE;     \
		}
#define ST(cc,rr,aa)    \
	if(opcycle == cc)    \
		{                 \
		WRITE(aa,rr);     \
		LASTCYCLE;        \
		}
#define LD(cc,rr,aa)    \
	if(opcycle == cc)    \
		{                 \
		rr = READ(aa);    \
		CHECK_NZ(rr);     \
		LASTCYCLE;        \
		}
#define ORA(cc,ee)    \
	if(opcycle == cc)  \
		{               \
		a |= READ(ee);  \
		CHECK_NZ(a);	 \
		LASTCYCLE;      \
		}
#define AND(cc,ee)    \
	if(opcycle == cc)  \
		{               \
		a &= READ(ee);  \
		CHECK_NZ(a);	 \
		LASTCYCLE;      \
		}
#define EOR(cc,ee)    \
	if(opcycle == cc)  \
		{               \
		a ^= READ(ee);  \
		CHECK_NZ(a);	 \
		LASTCYCLE;      \
		}
#define BIT(cc)            \
	if(opcycle == cc)       \
		{                    \
		TMP_READ;            \
		f &= 0x3d;           \
		f |= data & 0xc0;    \
		if((a & data) == 0)  \
			f |= FLAG_Z;      \
		LASTCYCLE;           \
		}
#define ADC(cc)            \
	if(opcycle == cc)       \
		{                    \
		TMP_READ;            \
		tmp = a + data + (f & FLAG_C); \
		CHECK_NZ(tmp);			\
		CLEAR(FLAG_C);       \
		CLEAR(FLAG_V);       \
		if(tmp & 0xFF00)     \
			SET(FLAG_C);      \
		f |= (((a ^ tmp) & (data ^ tmp)) & 0x80) >> 1; \
		a = tmp;             \
		LASTCYCLE;           \
		}
#define SBC(cc)            \
	if(opcycle == cc)       \
		{                    \
		TMP_READ;            \
		tmp = a - data - (1 - (f & FLAG_C)); \
		CHECK_NZ(tmp);			\
		CLEAR(FLAG_C);       \
		CLEAR(FLAG_V);       \
		if((tmp & 0xFF00) == 0)	\
			SET(FLAG_C);      \
		f |= (((a ^ tmp) & (a ^ data)) & 0x80) >> 1; \
		a = tmp;             \
		LASTCYCLE;           \
		}
#define ASL(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		CLEAR(FLAG_C);       \
		if(data & 0x80)      \
			SET(FLAG_C);      \
		data <<= 1;          \
		CHECK_NZ(data);      \
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		LASTCYCLE;           \
		}
#define LSR(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		CLEAR(FLAG_C);       \
		if(data & 1) {SET_FLAG_C;} \
		data >>= 1;          \
		CHECK_NZ(data);      \
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		LASTCYCLE;           \
		}
#define ROL(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		if(data & 0x80)      \
			{                 \
			data <<= 1;       \
			data |= f & 1;    \
			SET(FLAG_C);      \
			}                 \
		else                 \
			{                 \
			data <<= 1;       \
			data |= f & 1;    \
			CLEAR(FLAG_C);    \
			}                 \
		CHECK_NZ(data);      \
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		LASTCYCLE;           \
		}
#define ROR(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		if(data & 1)         \
			{                 \
			data >>= 1;       \
			if(f & FLAG_C)    \
				data |= 0x80;  \
			SET(FLAG_C);      \
			}                 \
		else                 \
			{                 \
			data >>= 1;       \
			if(f & FLAG_C)    \
				data |= 0x80;  \
			CLEAR(FLAG_C);    \
			}                 \
		CHECK_NZ(data);      \
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		LASTCYCLE;           \
		}
#define CMP(cc,rr,dd)                  \
	if(opcycle == cc)                   \
		{                                \
		tmp = (rr + 0x100) - READ(dd);   \
		CLEAR(FLAG_C);                   \
		if(tmp & 0x100)                  \
			SET(FLAG_C);                  \
		CHECK_NZ(tmp & 0xff);            \
		LASTCYCLE;                       \
		}
#define CL(ff)                \
	if(opcycle == 2)           \
		{                       \
		CLEAR(ff);              \
		LASTCYCLE;              \
		}
#define SE(ff)                \
	if(opcycle == 2)           \
		{                       \
		SET(ff);                \
		LASTCYCLE;              \
		}
#define B(cc)                                         \
	if(opcycle == 2)                                   \
		{						\
		data = READ(pc++);      \
		if(cc)					\
			{					\
			}					\
		else					\
			LASTCYCLE;			\
		}						\
	else if(opcycle == 3)                              \
		{                                               \
		READ(pc);                                    \
		tmp = pc + (signed char)data;  \
		if((tmp & 0xFF00) != (pc & 0xFF00))	/*page crossed*/	\
			pc = (pc & 0xFF00) | ((pc + (signed char)data) & 0xFF);	\
		else									\
			{									\
			pc = tmp;							\
			LASTCYCLE;							\
			}										\
		}                                               \
	else if(opcycle == 4)                              \
		{                                               \
		READ(pc);                                      \
		pc = tmp;									 \
		LASTCYCLE;                                   \
		}                                             
//undocumented opcodes
#define SLO(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		CLEAR(FLAG_C);       \
		if(data & 0x80)      \
			SET(FLAG_C);      \
		data <<= 1;          \
		a |= data;				\
		CHECK_NZ(a);			\
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		LASTCYCLE;           \
		}
#define SRE(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		CLEAR(FLAG_C);       \
		if(data & 1)			\
			SET(FLAG_C);      \
		data >>= 1;          \
		}                    \
	else if(opcycle == (cc+2))   \
		{                    \
		TMP_WRITE;           \
		a ^= data;				\
		CHECK_NZ(a);			\
		LASTCYCLE;           \
		}
#define RLA(cc)            \
	if(opcycle == cc){TMP_READ;} \
	else if(opcycle == (cc+1))   \
		{                    \
		TMP_WRITE;           \
		if(data & 0x80)      \
			{                 \
			data <<= 1;       \
			data |= f & 1;    \
			SET(FLAG_C);      \
			}                 \
		else                 \
			{                 \
			data <<= 1;       \
			data |= f & 1;    \
			CLEAR(FLAG_C);    \
			}                 \
		CHECK_NZ(data);      \
		}                    \
	else if(opcycle == (cc+2))   \
		{							\
		TMP_WRITE;           \
		a &= data;				\
		LASTCYCLE;           \
		}
#define RRA(cc)            \
	if(opcycle == (cc)){TMP_READ;} \
	else if(opcycle == ((cc)+1))   \
		{                    \
		TMP_WRITE;           \
		tmp = f & 1;			\
		f = (f & 0xFE) | (data & 1);\
		data >>= 1;				\
		data |= tmp;			\
		}                    \
	else if(opcycle == ((cc)+2))   \
		{                    \
		TMP_WRITE;           \
		tmp = a + data + (f & FLAG_C); \
		CHECK_NZ(tmp);			\
		CLEAR(FLAG_C);       \
		CLEAR(FLAG_V);       \
		if(tmp & 0xFF00)     \
			SET(FLAG_C);      \
		f |= (((a ^ tmp) & (data ^ tmp)) & 0x80) >> 1; \
		a = tmp;             \
		LASTCYCLE;           \
		}
#define NOP(cc)				\
	if(opcycle == cc)			\
		LASTCYCLE;
#define LAX(cc)				\
	if(opcycle == cc)			\
		{							\
		a = x = READ(EA);		\
		CHECK_NZ(a);			\
		LASTCYCLE;				\
		}
#define SAX(cc)				\
	if(opcycle == cc)			\
		{							\
		data = a & x;			\
		WRITE(EA,data);		\
		CHECK_NZ(data);		\
		LASTCYCLE;				\
		}
#define DCP(cc)								\
	if(opcycle == cc)							\
		{READ(EA);}								\
	else if(opcycle == (cc + 1))			\
		data = tmp = READ(EA) - 1;			\
	else if(opcycle == (cc + 2))			\
		{											\
		WRITE(EA,data);						\
		tmp = (a + 0x100) - data;			\
		CLEAR(FLAG_C);                   \
		if(tmp & 0x100)                  \
			SET(FLAG_C);                  \
		CHECK_NZ(tmp & 0xff);            \
		LASTCYCLE;                       \
		}
#define ISB(cc)								\
	if(opcycle == cc)							\
		{data = READ(EA) + 1;}				\
	else if(opcycle == (cc + 1))			\
		{WRITE(EA,data);}						\
	else if(opcycle == (cc + 2))			\
		{											\
		READ(EA);								\
		tmp = a - data - (1 - (f & FLAG_C));	\
		CHECK_NZ(tmp);							\
		CLEAR(FLAG_C);							\
		CLEAR(FLAG_V);							\
		if((tmp & 0xFF00) == 0)				\
			SET(FLAG_C);						\
		f |= (((a ^ tmp) & (a ^ data)) & 0x80) >> 1; \
		a = tmp;									\
		LASTCYCLE;								\
		}
